Submitter | phabricator |
---|---|
Date | Dec. 30, 2019, 1:32 p.m. |
Message ID | <8c08dd32512d16c0a094fd6530170808@localhost.localdomain> |
Download | mbox | patch |
Permalink | /patch/44129/ |
State | Not Applicable |
Headers | show |
Comments
Patch
diff --git a/tests/test-linelog.py b/tests/test-linelog.py --- a/tests/test-linelog.py +++ b/tests/test-linelog.py @@ -172,7 +172,7 @@ ll.replacelines_vec(rev, a1, a2, blines) else: ll.replacelines(rev, a1, a2, b1, b2) - ar = ll.annotate(rev) + ll.annotate(rev) self.assertEqual(ll.annotateresult, lines) # Verify we can get back these states by annotating each rev for lines, rev, a1, a2, b1, b2, blines, usevec in _genedits(